Optimization of VLS Growth Process for 4H-SiC P/N Junctions

4H-SiC pn Diode using Internal Ring(IR) Termination Technique

In this paper, the breakdown characteristic of 4H-SiC pn diode using Internal Ring(IR) termination technique is investigated. N-type 4H-SiC wafer having a 10um epilayer with a doping concentration of 5.4×10 15 /cm 3 was used to fabricate the pn diodes with one or two IRs. IR was formed by boron implantation of single energy of 360keV with 5×10 14 /cm 2 dose and activation annealing at 1700 o C ...

CVD growth of 3C-SiC on 4H-SiC substrate

The hetero epitaxial growth of 3C-SiC on nominally on-axis 4H-SiC is reported. A horizontal hot-wall CVD reactor working at low pressure is used to perform the growth experiments in a temperature range of 1200-1500 °C with the standard chemistry using silane and propane as precursors carried by a mix of hydrogen and argon. The optimal temperature for single-domain growth is found to be about 13...

Numerical Simulation and Optimization for 900V 4H-SiC DiMOSFET fabrication

We report the simulation results of 25μm half cell pitch vertical type 4H-SiC DiMOSFET using the general-purpose device simulator MINIMOS-NT. The best trade-off between breakdown voltage and on-resistance in terms of BFOM is around 19MW/cm 2 with a p-well spacing 5μm. The specific on -resistance, RON, sp, simulated with VGS=10V and VDS=1V at room temperature, is around 22.76mΩcm 2 . An 900V bre...

BREAKDOWN DEGRADATION ASSOCIATED WITH ELEMENTARY SCREW DISLOCATIONS IN 4H-SiC PN JUNCTION RECTIFIERS

It is well-known that SiC wafer quality deficiencies are delaying the realization of outstandingly superior 4H-SiC power electronics. While efforts to date have centered on eradicating micropipes (i.e., hollow core super-screw dislocations with Burgers vector > 2c), 4H-SiC wafers and epilayers also contain elementary screw dislocations (i.e., Burgers vector = 1c with no hollow core) in densitie...

Lateral Enlargement Growth Mechanism of 3C-SiC on Off-Oriented 4H-SiC Substrates